This invention generally concerns time domain to frequency domain signal converters. Specifically, the present invention relates to such signal converters which convert a relatively large bandwidth time domain input signal. More specifically, the present invention relates to such signal converters which sample the time domain input signal at a rate which is less than the Nyquist rate for the selected bandwidth. Alternatively, the present invention relates to such signal converters which increase frequency cell resolution over that achievable with a given number of input data samples.
Conventional time domain to frequency domain signal converters are well-known in the art. Many conventional signal processors, computers, and MSI logic circuits are capable of performing discrete fourier transformations. A discrete fourier transform (DFT) processor represents one form of a time domain to frequency domain signal converter. Such devices typically convert a time domain signal that represents a combination of one or more frequency components each of which exhibits an indeterminate frequency within a predetermined frequency band and each of which exhibits an indeterminate amplitude within a predetermined amplitude range. They typically output a signal which provides frequency domain information. The frequency domain information typically takes the form of a data array having amplitude information associated with each of a plurality of frequency cells. Thus, the time domain input signals' frequency components will be transformed into appropriate frequency cells. However, conventional systems which utilize DFT processors suffer limitations due to design constraints imposed by the DFT processors.
For example, DFT processors typically require an input data array obtained from sampling an input signal. The rate of sampling the input signal dictates the input frequency bandwidth which is transformed by the DFT processor. The Nyquist sampling rate, which is defined as being two samples for each complete oscillation of the maximum frequency of an input signal, defines a theoretical maximum bandwidth. Furthermore, the number of samples in an input data array dictates the frequency resolution of the DFT processor output.
Conventional systems which use DFT processors either suffer a limited bandwidth or utilize multiple DFT processors operating in parallel to address the bandwidth problems caused by sampling at slow rates. When multiple DFT processors operate in parallel, each operates over its own unique subband portion of a larger input frequency band. The use of multiple DFT processors causes the expense and complication of multiple DFT processors operating in parallel in addition to circuit complexity and expense connected with resolving ambiguities which occur through overlaps or gaps between the subbands.
In addition, a usually undesirable phenomenon called aliasing occurs when the input time domain signal contains frequency components either above or below the bandwidth for which the DFT processor is designed to operate. One conventional approach to the aliasing problem is to increase the sampling rate for the DFT processor above the theoretical minimum Nyquist sampling rate. However, as an undesirable consequence of this increased sampling rate, the system bandwidth achievable at a given sample rate decreases.
Another approach to the aliasing problem incorporates a sharp cutoff filter prior to the DFT processor to limit the influence of frequency components beyond the input frequency band. However, practical filters cannot achieve a sharp enough cutoff to completely solve the aliasing problem. Resultingly, typical systems which employ DFT processors use a combination of input filtering and increased sampling rates to address aliasing.